The present invention is directed to a method of assembling a semiconductor device and, more particularly, to a method of packaging a shielded semiconductor die with a cap element.
Semiconductor device packaging fulfills basic functions such as providing electrical connections and protecting the die against mechanical and environmental stresses. The completed semiconductor device may be mounted on a support with electrical connectors, such as a printed circuit board (‘PCB’). The semiconductor device may have exposed external electrical contact surfaces or leads for connection to the electrical connectors on the support. Using surface mount technology, external electrical contact surfaces or leads of the package can be soldered directly to corresponding pads on the support, providing mechanical attachment as well as electrical connections.
Semiconductor devices are commonly packaged for surface mounting by encapsulating one or more semiconductor dies, the encapsulation process including embedding the die or dies in a molding compound. Various techniques are available for connecting the external electrical contact surfaces or leads of the package internally with electrical contact pads on the embedded semiconductor die.
In a wire bonded package, the semiconductor die may be mounted on a die support with the contact pads of the semiconductor die on its active face opposite from the die support. Wires are bonded to the contact pads of the semiconductor die and to the external electrical contact surfaces or leads of the package to provide the internal connections, before encapsulation.
In a lead frame base package, the die support is an electrically conductive lead frame, whose frame members are cut off and discarded during production, to isolate the electrical contact surfaces or leads of the package from each other, after applying molding compound to embed and support the semiconductor die, the internal connections and the external electrical contacts from the lead frame. This technique is limited to devices where the external electrical contacts of the package are disposed around the periphery of the semiconductor die, either in active faces of the finished device or at edges of the device.
In a laminate or ceramic base package, the die support is an electrically insulating substrate bearing the external electrical contact surfaces. Examples of laminate base packages include ball grid array (‘BGA’), pin grid array (‘PGA’) and land grid array (‘LGA’) packages. In one technique of laminate base packages, before encapsulation, internal connections are made by wire bonding between the contact pads of the semiconductor die and the external electrical contact surfaces. After encapsulation, an array of solder balls or studs may be applied to the external electrical contact surfaces, typically before singulation of the encapsulated devices. In place of the balls or pins, LGA packages have metal pads that are contacted by pins on the PCB.
In another example of a laminate base package using a flip-chip technique, the die support is a temporary substrate that is removed after encapsulating the array of semiconductor dies. The contact pads of the semiconductor die on its active face are metallized and solder balls or studs are applied to the contact pads, typically before singulation. The singulated dies are then placed with their active face on a printed circuit board or other substrate bearing an array of corresponding external connectors. The solder is then re-melted (called reflow), typically using an ultrasonic or a reflow solder process to establish the electrical connections. This technique requires the same identical geometry for the array of contacts for the external connectors as for the array of contact pads on the semiconductor die.
In a variant of the flip-chip BGA technique known as ‘redistributed chip packaging’ (RCP), redistributing connections are made between the pads on the die surfaces and external contact pads in an electrically insulating substrate at the surface of the package to reroute the signals, power and ground connections. The redistribution process may include deposition of a plurality of electrically conductive layers by electroplating techniques, separated by insulating layers and patterned using batch process lithography. An array of solder balls or studs is applied to the external contact pads in the electrically insulating layers.
A semiconductor device may have a cap extending over one face of the semiconductor die or dies. Such a cap may be formed of a thermally conductive material and function as a heat sink, distributing internally generated heat over the face of the semiconductor die or dies and dissipating the heat, by conduction radiation and/or convection, for example. In another example, such a cap may be formed of an electrically conductive material and function as an electromagnetic shield element in order to reduce electromagnetic interference effects. In yet another example, a cap may be formed of a material of high magnetic permeability and function as a magnetic shield element against static or slowly varying magnetic fields.
Integrating the cap in the semiconductor device may involve extra process steps, increasing the cost of the device and introducing additional risks of manufacturing defects.